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參數(shù)資料
| 型號： | 24267A |
| 英文描述： | Dual, Temperature-Controlled Resistors with Internally Calibrated Monitors |
| 中文描述： | “AMD的K6E家庭”，“嵌入”，“處理器的AMD PowerNow！？技術(shù)平臺設(shè)計(jì)指南應(yīng)用指南“ |
| 文件頁數(shù)： | 15/50頁 |
| 文件大?。?/td> | 957K |
| 代理商： | 24267A |
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Dynamic Core Frequency and Core Voltage Control
9
24267A/0—December 2000
AMD PowerNow! Technology Platform Design Guide for Embedded Processors
Preliminary Information
BF[2:0] Strapping Considerations
Systems that do not use the AMD PowerNow! technology
dynamic core frequency control mechanism should strap the
BF[2:0] inputs of the CPU (with pull-up/pull-down resistors) to
select the desired CPU operating frequency at power up.
Systems that use AMD PowerNow! technology dynamic core
frequency control mechanisms have two primary strapping
options for the BF[2:0] inputs:
I
Strap the BF[2:0] inputs to select the maximum CPU core
frequency at power up
(recommended)
Strap the BF[2:0] inputs to select the minimum CPU core
frequency at power up
I
Selecting Maximum
CPU Core Frequency
Systems can strap the BF[2:0] inputs to allow the processor to
boot at its maximum rated frequency when RESET is asserted.
BIOS can then determine the maximum frequency of the
processor by reading the PSOR model-specific register, which
stores the state of the EBF[2:0] bits. For more information on
the PSOR register, see the
Embedded AMD-K6 Processors BIOS
Design Guide Application Note
, order# 23913.
See “Safe Voltage and Frequency Combination at Reset” on
page 20 for the advantages and disadvantages of booting at
maximum core frequency.
Selecting Minimum
CPU Core Frequency
Systems that strap the processor BF[2:0] inputs to 100b allow
the processor to boot with a core frequency of 2.0x the
processor bus frequency when RESET is asserted. If a different
CPU core frequency is desired prior to loading the OS, it is the
responsibility of the BIOS, early in the POST routine, to
transition the processor core frequency and voltage to the
desired performance level.
See “Safe Voltage and Frequency Combination at Reset” on
page 20 for the advantages and disadvantages of booting at a
minimum core frequency.
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