參數(shù)資料
型號: 23711
英文描述: Understanding Page Mode Flash Memory Devices
中文描述: 理解頁面模式閃存設(shè)備
文件頁數(shù): 3/5頁
文件大?。?/td> 89K
代理商: 23711
Understanding Page Mode Flash Memory Devices
2
Table 2.
Byte Mode
HOW DOES A PAGE MODE READ WORK
The first read from the page mode device is identical to
a read from a standard flash device: CE# and OE#
must go to V
IL
, and a valid address must be placed on
A19:A0. This first read has an access time t
CE
or t
ACC
which is typical of a standard flash device. However, a
subsequent Page read access to a location anywhere
within the same page is much faster. This access time
is denoted as t
PACC
. Fast Page mode accesses are ob-
tained by keeping A3–A19 constant and changing A0–
A2 to select the specific word, or changing A–1 to A2 to
select the specific byte, within that page.
WHAT ARE THE BENEFITS OF
OPERATING IN PAGE MODE
The major benefit of operating in Page Mode is the
speed. Some other benefits are potential reductions in
cost and power consumption. It would be possible to
build a fast memory subsystem through the use of mul-
tiple memory devices in a technique called bank inter-
leaving. However, bank interleaving requires multiple
memories and external logic, which significantly add to
cost compared to a single Page Mode memory device.
Page Mode devices can also reduce power in two
ways. First, by reducing the time power must be at the
higher active read consumption level. Second, in some
Page Mode devices, by reducing the active read cur-
rent requirement following the initial access time, such
that the average power for a series of page reads is
lower.
To demonstrate the speed advantage of a Page Mode
device, we will compare the timing of the Am29PL160C
to a standard flash device.
Figure 1.
Timing Diagram For Am29PL160C Page Mode Read (Byte Mode)
The Am29PL160C is available with t
ACC
varying from
60 ns to 120 ns, but we will look at one in which t
ACC
=
90 ns, and t
PACC
= 30 ns. Figure 1 clearly depicts that
the initial access time of 90 ns is required to do the first
read from a given page, but each subsequent read
from the page is only 30 ns. Each read from within the
page is triggered by changing A–1 to A2.
Byte
A2
A1
A0
A-1
Byte 0
0
0
0
0
Byte 1
0
0
0
1
Byte 2
0
0
1
0
Byte 3
0
0
1
1
Byte 4
0
1
0
0
Byte 5
0
1
0
1
Byte 6
0
1
1
0
Byte 7
0
1
1
1
Byte 8
1
0
0
0
Byte 9
1
0
0
1
Byte 10
1
0
1
0
Byte 11
1
0
1
1
Byte 12
1
1
0
0
Byte 13
1
1
0
1
Byte 14
1
1
1
0
Byte 15
1
1
1
1
A3
-
A19
CE#
OE#
A
-
1
-
A2
Data Bus
Same Page
Aa
Ab
Ac
Ad
Qa
Qb
Qc
Qd
t
ACC
t
PACC
t
PACC
t
PACC
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